In the complex world of chip design, it’s easy for register definition — that unglamorous but crucial piece — to be overlooked. Yet, ask any verification engineer or firmware developer, and they’ll tell you: poorly defined registers are a recurring source of delay, bugs, and rework. This is where SystemRDL steps in — not with …
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Custom FPGA Board DDR2-SODIMM DQ & DQS Swap Issue
While working on a European Research project called FASTMATCH where the project demonstration was carried out by implementing and intelligent high-speed Intrusion Detection System (IDS). The demonstrator platform was a custom developed 14 layer electronic circuit board comprising of two Xilinx Virtex-5 FPGAs performing real-time line-rate string matching at 10Gbps. During our development, we noticed …
Continue reading Custom FPGA Board DDR2-SODIMM DQ & DQS Swap Issue